The 18Nov2009 release included the following binaries:

TIM 12B9 18 11 09
OUT 1BA9 27 10 09
WBC 06B9 06 11 09
VSI 1BA9 27 10 09
MCB 1968 25 06 08
INP 0DB9 13 11 09
FIR 10B9 16 11 09
DLY 1BA9 27 10 09
CFG 0519 05 01 09

TIM and WBC are not up to date. What Kerry listed below seems to be a
mixture of two releases.

Dave.

-----Original Message-----
From: widar-wg-bounces@donar.cv.nrao.edu
[mailto:widar-wg-bounces@donar.cv.nrao.edu] On Behalf Of Michael Rupen
Sent: December 1, 2009 7:29 AM
To: Kerry Shores
Cc: widar-wg@aoc.nrao.edu
Subject: Re: [widar-wg] Status of Widar hardware

Many thanks Kerry!!

The recently booted StBs are running:
Input FPGA version 27 10 9
DM FPGA version 27 10 9
WBC FPGA version 27 10 9
MCB FPGA version 25 6 8
CFG FPGA version 5 1 9
Filter FPGA version 16 11 9
Timing FPGA version 2 11 9
Output FPGA version 27 10 9
Dave F., would you confirm that this is what you think we should be
running?

Based on the Filter FPGA (I assume 16 11 9 is 16nov09, so this is the
latest date), all the StB are running the latest except:
s005-t-{1 2 4 5 6} Timing FPGA version 16 9 11 (!!) rebooted
12-14d ago
s005-t-7 Timing FPGA version 27 9 10 rebooted
13d11h ago
s005-b-{0 1 2 4} Timing FPGA version 27 9 10 rebooted
13d12h ago
s005-b-{3 5} Timing FPGA version 27 10 9 (!) rebooted
6d21h ago
s006-b-{0-6} Timing FPGA version 16 9 11 (!!) rebooted
12-14d ago
s007-b-{1 3 5 6} Timing FPGA version 16 9 11 (!!) rebooted
12-14d ago
s008-t-{1-4 6 7} Timing FPGA version 16 9 11 (!!) rebooted
12-14d ago
If Dave says the recently booted StB are running the right firmware
I'll go through and reboot all the others.



****NOTE * below => GUI error****


> > s002-b-4 - cmib is there, but not happy about something. Rebooting
once
> > did not help.

Tried power cycling the board. Programmed but default configuration
failed.

> > s003-t-7 - Ant. 8D DTS module is not happy. Can fix this when we next
> > have test time (so I can muck with the antenna).

We have software time this afternoon (Tuesday).



Checking the individual StB:

*
In the Timing FPGA GUI, the yellow background does not manifest for
CPU
  UT-obsTime <0 -- should be based on the ABSOLUTE VALUE of the time
  difference *

s001-t-
TC-A, B hop counts are wrong:
    StB   A-hop          B-hop (B-bop?)
  s001-t-0   3           10 s/b 11
        -1   4            9 s/b 10
        -2   5            8 s/b 9
        -3   6            1 s/b 8
        -4   7            7
        -5   8            6
        -6   7 s/b 9    5
        -7   9 s/b 10    4
s001-t-3 TC-B is bad (TimeCode CRC & PPS Interval errors, TimeCode
Second
    fixed at 0, hop count=1 [s/b 7], System PPS Interval error)
s001-t-6 TC-A TimeCode CRC yellow; Second frozen at 38; Hop Count shows
7
    but should be 9. Using TC-B.
  Input FPGA shows input ports mis-aligned. Deformatter GUI looks
    fake (no deframer time/errors, no aligner values, no optical power,
    etc.).
    --> rebooted deformatter, all OK now.
s001-t-7 Input FPGA shows input ports mis-aligned. Deformatter GUI
looks
    fake (no deframer time/errors, no aligner values, no optical power,
    etc.).
    --> rebooted deformatter, all OK now.
  TC-A hop count is wrong -- shows 9, should be 10. TC-A otherwise OK.


s002-t-{0 1} TC-B hop counts are wrong:
    StB   B-hop (B-bop?)
  s002-t-0   0 s/b 12
        -1  10 s/b 11
        -2  10
        -3   9
        -4   8
        -5   7
        -6   6
        -7   5
s002-t-0 TC-B shows TimeCode Second and Hop Count both 0. Otherwise
green!
s002-t-{3 4 5 6} were programmed but not configured.
    --> Ran startup sequencer by hand -- all fine now!
      Not sure what happened here.
  * Note that this does not show up on the CPCC GUI. We should
indicate
    which StB are not "running" at this top level.


s002-b- TC-A hop counts are wrong:
    StB   A-hop
  s002-b-0   2
        -1   3
        -2   4
        -3   5
        -4   6
        -5   7
        -6   missing s/b 8
        -7   8 s/b 9
s002-b-{0-3} TC-B missing (frozen time, crazy hop count, TimeCode CRC
yellow
    -- but other LEDs are green!)
s002-b-1 Input FPGA shows input ports misaligned.
    --> Re-locked demux. Lots of deframer errors for port B
(~500/second)
      but ABC are now all aligned.
s002-b-4 stopped at "configuring."
    --> ran startup sequencer -- failed at "configuring." Rebooted
StB.
      Failed again "board default configuration FAIL, all LUTs are
invalid"
      Came up with CPU UT-obsTime
-2 seconds.
s002-b-5 was running with CPU UT - obsTime off by ~38000 sec (10h40m)
and
counting, using TC-B. TC-B was incrementing with time while TC-A
was not.
--> ran startup sequencer, all fine now.
*
This does not show up on the CPCC GUI, but probably should.
s002-b-6 programmed but not configured.
--> ran startup sequencer -- failed at "configuring." Rebooted
StB.
TC-A is missing (Second, Hop Count=0 ; CRC, PPS Interval yellow)
s002-b-7 TC-A hop count is wrong (shows 8, s/b 9)


** s003-t-1 does not show up on the CPCC or rack-level GUIs, but looks
fine
in the StB GUI. I've never seen this sort of discrepancy before.


s005-t-* TC-A hop counts are wrong:
StB A-hop
s005-t-0 7
-1 8
-2 8 s/b 9
-3 9 s/b 10
-4 10 s/b 11
-5 11 s/b 12
-6 12 s/b 13
-7 13 s/b 14
s005-t-* TC-B missing (crazy Second, Hop Count; lots of yellow LEDs)
**What does it take to turn a TimeCode Status Details LED red???
s005-t-1 ObsTime seconds incrementing too slowly, minutes too fast !
TC-A frozen in time; TC-B missing
--> ran startup sequencer -- TC-B is still missing but otherwise
all is
well!
s005-t-6 time was off by 30 seconds.
--> set to CPU time using the Timing FPGA GUI -- then it was only
off by
2 seconds. Ran the startup sequence, all good now.
...came back a few minutes later -- time is way off again (18
seconds)
**s005-t-7 CPCC & rack-level GUI claims programming in progress
but StB GUI looks fine.


**s005-b-* CPCC & rack-level GUI claims programming in progress
but StB GUIs look fine.


s006-t-* TC-A, B hop counts are wrong. I don't have the energy to go
any further into timing details now...
s006-t-0 TC-B missing (crazy Second, Hop Count; lots of yellow LEDs)
s006-t-2 ObsTime seconds incrementing too slowly, minutes too fast !
TC-A missing; TC-B frozen in time
--> ran startup sequencer -- all OK now
s006-t-4 ObsTime seconds incrementing too slowly, minutes too fast !
TC-A missing; TC-B frozen in time
--> ran startup sequencer -- failed at configuring.
s006-t-7 was configured but not running.
--> ran startup sequencer, all well now.


s007-b-7 was configured but not running.
--> ran startup sequencer, all well now.


I would still like to move b101-b-2 to b101-b-6 to get both bad BlBs in
the same BlB pair.


Off to other work for a while...


Michael
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-- JuergenOtt - 2009-12-01
Topic revision: r1 - 2009-12-01, JuergenOtt
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