VEGAS Team Meeting

August 19, 2013

Attendees

CALTECH, UC-B, & Columbia

Glenn, Mark, Andrew

NRAO:

Marty, Anish, John, Richard, Randy, Paul, Amanda, Ray

Agenda:

  • Testing
    1. Items discovered during testing
    2. switching signals and blanking [decision neeed]
    3. Formal test documentation [see Test Schedule & Matrix ]
    4. Need a good overview of each of the basic modes (HnK/HBW, Ln/LBWn)
  • Old business
    • Tuning executable threads to cores needs to occur
      1. need to find what cores OS uses and allocate around those cores.
      2. NRAO will look at how to accomplish this activity. (number of threads is < number of cores)

Meeting Notes:

  • Testing
    1. Items discovered during testing
      • VEGAS managaer wasn't talking to IF manager - cleared by Melinda
      • Seems to be dropping last ~3 seconds of scans in a map - Ray belives the fix relates to the last buffer not being full and subsequently not being writted to disk by the manager has been implemented in DIMAS and can likely be retrofitted to VEGAS
    2. switching signals and blanking for L1/LBW1 manager
      • Keep it as is now and add a more capability later
    3. Formal test documentation [see Test Schedule & Matrix ]
      • Mode #1 test report due Wednesday
      • ADC documentation all but cross correlation test complete
      • PFB documentation circulated H16K tests reain and
      • Anish will add last updates to modes table on wiki
    4. Need a good overview of each of the basic modes (HnK/HBW, Ln/LBWn)
      • Query circulated by Ray(1) - Glenn to expand on Mark W's documentation
  • Old business
    • Tuning executable threads to cores needs to occur
      • Implemented but not yet tested

(1) Ray's Note The biggest problem I face in trying to make sense of what needs to be done to configure the various modes is that I haven't found a good overview of each of the basic modes (HnK/HBW, Ln/LBWn).

I can back out much of this information by looking at docs such as mode tables and Mark's docs on google docs, and following discussions here, but that goes only so far (I had for instance worked out that 'spec_tick' didn't make sense in the LBW modes, but wasn't sure this wasn't a misunderstanding on my part). What I really could use is a good "theory of operations" type document for each mode, a good end-to-end overview: What problem is each mode solving? What happens to the data, and why, from input to FPGA all the way to FITS file for each?

This lack of a good overview and of consistent terms has made it very confusing to try to follow these discussions (let alone participate), and to do anything useful with the information (i.e. program the manager to sensibly configure the system, not just the FPGA). If I might use an analogy, it's a bit like trying to put together a mental model of a dark room from random illuminations from a flashlight. I'm not asking for excruciating detail here, just a few concise paragraphs on each mode; but I do need enough information to form a useful mental model of each mode.

So, if I'm wrong, and such a thing exists, please say 'RTFM--here is link' (though I have looked). If not surely someone here knows it cold and is good at explaining things? I know we are all super busy, but that's just it: I've spent too much time already trying to figure all this out without a great deal to show for it. A good start would be L1/LBW1 since I've got HnK/HBW down and now am being asked to configure L1/LBW1.

Other items:

Next Teleconference: August 26, 2013 .

-- MartyBloss - 2013-08-19
Topic revision: r3 - 2013-08-20, MartyBloss
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