GUPPI Software Parameters

This is a quick list of the software parameters discussed during the GUPPI brainstorming session.

Control Parameters

Definitions:
  • Manager parameter -- Sent to manager, but not necessarily written to a hardware register Manager may use for purposes of figuring out other parameters, or for figuring out what FPGA personalities to load.

Name Description Units Type Destination Config file? Default value Notes
Top Level Manager Parameters
bandwidth Bandwidth (or resulting bandwidth) MHz double None No 800.0 100, 200, 400, 800 MHz modes
cal_freq Frequency of pulsed cal signal Hz double DAQ/CAL_FREQ No 25.0  
cal_mode Cal mode None enum DAQ/CAL_MODE No off {"on", "off"}
chan_dm Dispersion measure None double DAQ/CHAN_DM No 0 Used only in coherent mode
data_dir Data directory None string DAQ/DATADIR No ""  
fold_nbins Number of pulse phase bins None integer DAQ/NBIN No 256  
integration_time Integration time μs double None No 40.96  
nchan Number of channels None integer None No 2048  
obs_mode Observing mode None enum DAQ/OBS_MODE No "search" {"cal", "fold", "search", "coherent_cal", "coherent_fold", "coherent_search"}
output_nbit Output resolution in bits bits integer None No 8  
par_file Path to pulsar parameter file None string DAQ/PARFILE No ""  
polarization_mode Polarization mode None enum None No "full_stokes" {"full_stokes", "total_intensity"}
scale_I Pre-accumulator scaling None double BEE2/FPGA2/SCALE_I No 1.0  
scale_Q Pre-accumulator scaling None double BEE2/FPGA2/SCALE_Q No 1.0  
scale_U Pre-accumulator scaling None double BEE2/FPGA2/SCALE_U No 1.0  
scale_V Pre-accumulator scaling None double BEE2/FPGA2/SCALE_V No 1.0  
tfold DAQ folding time seconds double DAQ/TFOLD No 60.0  
Miscellaneous
adc_gain ADC Gain V/bit ufix 32_?(?) iBOBs Yes 1 Tweakable from tinysh
adc_offset ADC Offset Volts ufix 32_?(?) iBOBs Yes 0 Tweakable from tinysh
adc_phase ADC Phase Degrees ufix 32_?(?) iBOBs Yes 0 Tweakable from tinysh
frame_size Output Frame size bytes int 32_0(?) Bee2 yes (4096 * 2) + 16 bytes Use Jumbo packets (Not implemented)
ip_addr_bee2 10 GbE IP address of BEE2 IP address N/A Bee2 yes 192.168.3.X  
ip_addr_host 10 GbE IP address of host computer IP address N/A Bee2 yes 192.168.3.7
scan_number scan number None (Manager) None N/A 1 Manager Parameter
The following are to be used to control the GUPPI data collection. Jason and Randy to specify how to use them to control the machine
BW_SEL Bandwidth select None ? Bee2 yes 1 x for yyyMHz, z otherwise
DELAY_SEL ? None ? Bee2 yes 0  
DC_BINS_EN FFT ouput BRAM enable None bool Bee2 yes 0  
DC_BRAM_EN raw samples BRAM enable None bool Bee2 yes 0  
FFT_SHIFT FFT shift factor bit mask N/A Bee2 yes 0xFFFFFFFF  
GUPPi_PIPES_ARM Arm toggle None ufix 1_0 Bee2 yes 0 Either 0 or 1; toggle to send an arm command
GUPPi_PIPES_BW_SEL Pipes bandwidth select None ? Bee2 yes 2 x for yyyMHz, z otherwise
LE_CNTRL Latch enable (?) None ? Bee2 yes 0  
SAMP_CMD iBOB commands over XAUI0 None Ufix 4_0 Bee2 yes 0
OFFSET_I Pre accumulator offset None fix 32_16 Bee2 yes 0 Fix_32_16, Adjustable to bring usable bits within correct output word. Needed for V 1.0
OFFSET_Q Pre accumulator offset None fix 32_16 Bee2 yes 0 Fix_32_16, Adjustable to bring usable bits within correct output word. Needed for V 1.0
OFFSET_U Pre accumulator offset None fix 32_16 Bee2 yes 0 Fix_32_16, Adjustable to bring usable bits within correct output word. Needed for V 1.0
OFFSET_V Pre accumulator offset None fix 32_16 Bee2 yes 0 Fix_32_16, Adjustable to bring usable bits within correct output word. Needed for V 1.0
ROL_SEL Read-out length select None ufix 1_0 Bee2 yes 1 Changes polarization mode from full stokes (I/Q/U/V) to total intensity (I/Q)
SCALE_I Pre accumulator scaling None ufix 32_16 Bee2 yes 1 UFix_32_16, Adjustable to bring usable bits within correct output word. Needed for V 1.0
SCALE_Q Pre accumulator scaling None ufix 32_16 Bee2 yes 1 UFix_32_16, Adjustable to bring usable bits within correct output word. Needed for V 1.0
SCALE_U Pre accumulator scaling None ufix 32_16 Bee2 yes 1 UFix_32_16, Adjustable to bring usable bits within correct output word. Needed for V 1.0
SCALE_V Pre accumulator scaling None ufix 32_16 Bee2 yes 1 UFix_32_16, Adjustable to bring usable bits within correct output word. Needed for V 1.0
output_res Output resolution in bits bits ? Bee2 NI 8 V 1.0 of GUPPI has only 8 bit output. THe register should be implemented, but does not do anything until Mitch finishes his work on the block.

Parameter Dependencies

The dependency tree for GUPPI parameters is shown below. A -> B means that A depends upon B. Parameters higher in the hierarchy are written first.

param depend.png

Testing

Two sets of tests exist for the manager:
  • Unit tests exercise basic parameter ranges and immediate dependencies. E.g. if A -> B and B is set to X, is A set correctly to Y?
  • Configuration tests ensure that parameter dependencies work from top to bottom. E.g. given a "top level" parameter set, are the lower level parameters set correctly?

Functional

  • Load firmware/default values
    • Load iBOB_GUPPi_SAMP_800MHz_2008_Feb_14_1157.bit into both iBOBs
    • Start bee2_guppi_dsp_User1_4K_fpga4_2008_Feb_20_1022.bof in the Bee2
    • Start bee2_guppi_dsp_User3_4K_fpga4_2008_Feb_20_1407.bof in the Bee2
    • Start bee2_guppi_output_User2_fpga4_2008_Feb_20_1002.bof in the Bee2
    • At the tinysh prompt of both FPGA1 and FPGA4, send the following:
      • regw FFT_SHIFT_CNTRL 4294967295
      • regw pulse_length 10000000
      • regw bee2_tx_en 1 // enable Bee2 XAUI transmitting
      • regw iBOB_CMD_0 3 // enable iBOB XAUI transmitting & arm the 1PPS block
      • regw bee2_rx_en 1 // enable Bee2 XAUI receiving
  • Arm to start on next 1PPS
    • At the tinysh prompt of both FPGA1 and FPGA4, send the following:
      • regw BINS_EN 1 // enable writing to BINS BRAMs (diagnostic only)
      • regw iBOB_CMD_0 7 // these commands strobe "retrig" in the 1PPS block
      • regw iBOB_CMD_0 3
      • regw BINS_EN 0 // disable writing to BINS BRAMs (diagnostic only)
      • printdata // display BINS values (diagnostic only)
  • Start 10Ge output
  • Stop 10Ge output

Monitor Values

Name Description Units
temperature Temperature(s) Degrees C
voltage Power supply voltages Volts
link_status Link status bit field
  RMS(s)of scope monitor points None
data_skew Sync compensation value clocks
  Packet loss rate packets/sec
  Packet loss total per scan packets/scan
heartbeat Heartbeat None

Scope Monitoring Points

  • ADC 'pocket spectrometer' output
    • Vector of length N, N ~512-1024
  • Post FFT output
    • Vector of length N N == Number of Channels
  • Post vector accumulator
    • Vector of length N, N == Number of Channels
  • ADC Scope output
    • Vector of length N, N == remainder of BRAM left

Auxiliary FITS Header Information

  • Firmware revision/serial number string for each FPGA/board

Output Data Frame Format

(Ignoring UDP/IP headers)

Name TypeSorted ascending
Packed Data 8.7[8] x N
Frame Counter 64.0 (64 bit unsigned long long)
Frame Status 64.0 (64 bits unsigned long long)

Where Frame Status is a bit field with flags for sync, overflow, underflow, etc. Note that it is at the END of the frame. This is because we don't know what the status of the frame is until we've assembled it.

Where Packed Data has one of the following forms: Mentally substitute I,Q,U,V for XX,YY,XY,YX. and so on to fill a buffer of frame length bytes with an integral number of spectra. In this way any data-loss can be dealt accounted without dropping data actually received correctly. This does imply packets may be slightly less than frame length, depending upon configuration.
Topic revision: r25 - 2010-05-13, PatrickBrandt
This site is powered by FoswikiCopyright © by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding NRAO Public Wiki? Send feedback