TGBT14A_912_130 - Test new analog IF modules in Banks C and D
what the title says
1pm set up. Takes 40 mins to get right versions of software, etc
X-band in position, but they are working on the subreflector
Scan 4 vegas_test_xband_mode02_tp_local_30sint - 60 second scan
completes, but GBTIDL display looks confusing. Start a 10 minute scan
Scan 5 vegas_test_xband_mode02_tp_local_30sint - 10 min scan intended, but only runs for one minute
Scan 6 repeat - ten minutes
Problem may be that IF Manager thinks bank D only has signal as far as the input to the Analog IF module
Ray "reloads" cabling file, scan 7 and now it appears that all is ok.
have a weird, high frequency ripple in Banks E and G - where is this coming from?
type switching to mode 1.
scan 8 vegas_test_xband_mode01_tp_local_30sint - 60 sec scan - same problem.
scan 9 vegas_test_xband_mode01_tp_local_30sint - 60 sec scan - same problem.
Suddenly, IF power returns. Jonah was working on IF rack power supply!
IF balancing errors have now gone away. But, we still have the weird ripple in E and G.
Now they have finished....
Scan 11 - same. The ripple is only in pol 0, not in pol 1.... Galen thinks there is a cabling problem in the receiver?
Scan 12 Try bank_gain_mode1_cband_fast - problem is also there in C-band, so seems to be receiver independent.
Scan 13 vegas_test_xband_mode02_tp_local_30sint - 10 min scan
Cannot get Adam's scripts to process this; abandon at this point, and try to write a quick python procedure to do it.
temp.py in my home directory does this specifically for scan 13 - pol 0 of banks C and D match up as expect.
We can leave these modules in!
Leave Galen to try to diagnose the weird ripple problems in Banks E and G.
This topic: CICADA
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